Intel Archive

Today we have something that has taken months to write, and we feel that the best we have done is to give a sense of what Intel’s coolest CPU is capable of. The Intel Xeon MAX 9480 combines 56 cores with memory on the package. The memory is not standard DDR5. Instead, it is 64GB of HBM2e, the same kind of memory found on many GPUs and AI accelerators today. What seemed like a straightforward review at the outset became absolutely fascinating, especially when we pulled all of the DDR5 memory from a system and watched it boot. Let us get to it. Few of us will ever get to use one of these – especially since they’re specifically designed for a supercomputer – but maybe we’ll get lucky and they end up on eBay or AliExpress ten years from now.

During the opening keynote at Intel’s Innovation event in San Jose, Chief Executive Officer Pat Gelsinger unveiled a score of details about the upcoming Meteor Lake client platform. Intel’s Meteor Lake marks the beginning of a new era for the chipmaker, as they move away from the chaotic Intel 7 node and go into a rollout of their Foveros 3D packaging with EUV lithography for their upcoming client mobile platform. Meteor Lake uses a tiled, disaggregated chiplet architecture for its client-centric processors for the first time, changing the very nature of Intel’s consumer chips going forward. And, according to Intel, all of these changes have allowed them to bring some significant advancements to the mobile market. Intel’s first chiplet-based consumer CPU breaks up the common functions of a modern CPU into four individual tiles: compute, graphics, SoC, and an I/O tile. Within the makeup of the compute tile is a new pair of cores, a P-core named Redwood Cove and a new E-core called Crestmont. Both these cores promise IPC gains over their previous counterparts, but perhaps the most interesting inclusion is a new type of E-core embedded directly into the SoC tile, which Intel calls ‘Low Power Island.’ These new LP E-cores are designed with the idea that light workloads and processes can be taken off the more power-hungry compute tile and offloaded onto a more efficient and lower-powered tile altogether. Other major additions include a first-for-Intel Neural Processing Unit (NPU), which sits within the SoC tile and is designed to bring on-chip AI capabilities for workloads and inferencing, paving the way for the future. With Meteor Lake, Intel is aiming to put themselves in a more competitive position within the mobile market, with notable improvements to compute core hierarchy, Intel’s Xe-LPG Arc-based graphics tile looking to bolster integrated graphics capabilities, and an NPU that adds various AI advantages. Meteor Lake also sets the scene for Intel and modular disaggregation, with Foveros 3D packaging set to become a mainstay of Intel’s processor roadmap for the future, with the Intel 4 process making its debut and acting as a stepping stone to what will become Intel’s next mainstay node throughout its fabs, Intel 3. AnandTech takes its usual in-depth look at Intel’s upcoming Meteor Lake platform, which seems like it will be a rather radical shift for the company. It’s also the first generation whithout Intel’s Core ix naming scheme, so things might be a bit confusing for a while post-launch.

SoftBank has been gearing up anchor investments in Arm Holdings among its clients and partners for months now (ahead of the upcoming IPO) and apparently Intel is among them. In a call for the Goldman Sachs Communacopia & Technology Conference, the head of the company’s foundry business unit confirmed that the chip giant has made an investment in Arm because its technology is strategically important for both Intel Foundry Services and Altera FPGA unit. This doesn’t seem to be an indicator Intel is interested in making ARM chips – it seems to have more to do with Intel becoming a fab for other companies’ ARM chips.

Intel has announced two new x86-64 instruction sets designed to bolster and offer more performance in AVX-based workloads with their hybrid architecture of performance (P) and efficiency (E) cores. The first of Intel’s announcements is their latest Intel Advanced Performance Extensions, or Intel APX as it’s known. It is designed to bring generational, instruction set-driven improvements to load, store and compare instructions without impacting power consumption or the overall silicon die area of the CPU cores. Intel has also published a technical paper detailing their new AVX10, enabling both Intel’s performance (P) and efficiency (E) cores to support the converged AVX10/256-bit instruction set going forward. This means that Intel’s future generation of hybrid desktop, server, and workstation chips will be able to support multiple AVX vectors, including 128, 256, and 512-bit vector sizes throughout the entirety of the cores holistically. The basic gist is that these two new instruction sets should bring more performance at lower energy usage.

The Intel i960 was a remarkable 32-bit processor of the 1990s with a confusing set of versions. Although it is now mostly forgotten (outside the many people who used it as an embedded processor), it has a complex history. It had a shot at being Intel’s flagship processor until x86 overshadowed it. Later, it was the world’s best-selling RISC processor. One variant was a 33-bit processor with a decidedly non-RISC object-oriented instruction set; it became a military standard and was used in the F-22 fighter plane. Another version powered Intel’s short-lived Unix servers. In this blog post, I’ll take a look at the history of the i960, explain its different variants, and examine silicon dies. This chip has a lot of mythology and confusion (especially on Wikipedia), so I’ll try to clear things up. Not even Intel can overcome x86 – and I can guarantee you: neither will ARM. The truth is that x86 simply cannot die.

This whitepaper details the architectural enhancements and modifications that Intel is currently investigating for a 64-bit mode-only architecture referred to as x86S (for simplification). Intel is publishing this paper to solicit feedback from the ecosystem while exploring the benefits of extending the ISA transition to a 64-bit mode-only solution. This seems like a very good idea – and it does seem like the time is ripe to remove some of the unused cruft from x86. Intel is proposing removing removing the 16 bit and 32 bit modes, and instead start in 64 bit mode right away. The company’s proposal does retain the ability to run 32 bit code on a 64 bit operating system, though. As a sidenote, the introduction to this proposal is hilarious: Since its introduction over 20 years ago, the Intel® 64 architecture became the dominant operating mode. As an example of this evolution, Microsoft stopped shipping the 32-bit version of their Windows 11 operating system. Intel firmware no longer supports non UEFI64 operating systems natively. 64-bit operating systems are the de facto standard today. They retain the ability to run 32-bit applications but have stopped supporting 16-bit applications natively. It’s 2023, and Intel is still not, in any way, capable of acknowledging AMD for coming up with AMD64. Sad.

One interesting aspect of a computer’s instruction set is its addressing modes, how the computer determines the address for a memory access. The Intel 8086 (1978) used the ModR/M byte, a special byte following the opcode, to select the addressing mode. The ModR/M byte has persisted into the modern x86 architecture, so it’s interesting to look at its roots and original implementation. In this post, I look at the hardware and microcode in the 8086 that implements ModR/M and how the 8086 designers fit multiple addressing modes into the 8086’s limited microcode ROM. One technique was a hybrid approach that combined generic microcode with hardware logic that filled in the details for a particular instruction. A second technique was modular microcode, with subroutines for various parts of the task. This is way above my pay grade, but I know quite a few of you love this kind of writing. Very in-depth.

Intel recently announced a big driver update for their Arc GPUs on Windows, because their DirectX 9 performance wasn’t as good as it could have been. Turns out, they’re using code from the open source DXVK which is part of Steam Play Proton. DXVK translates Direct3D 9, Direct3D 10 and Direct3D 11 to Vulkan. Primarily written for Wine, the Windows compatibility layer, which is what Proton is made from (Proton is what the majority of games on Steam Deck run through). However, it also has a Native implementation for Linux and it can be used even on Windows too. So it’s not a big surprise to see this. Heck, even NVIDIA use DXVK for RTX Remix. Windows gamers benefiting from open source technology for gaming on Linux. My my, the turntables!

The 8086 microprocessor is one of the most important chips ever created; it started the x86 architecture that still dominates desktop and server computing today. I’ve been reverse-engineering its circuitry by studying its silicon die. One of the most unusual circuits I found is a “bootstrap driver”, a way to boost internal signals to improve performance. This circuit consists of just three NMOS transistors, amplifying an input signal to produce an output signal, but it doesn’t resemble typical NMOS logic circuits and puzzled me for a long time. Eventually, I stumbled across an explanation: the “bootstrap driver” uses the transistor’s capacitance to boost its voltage. It produces control pulses with higher current and higher voltage than otherwise possible, increasing performance. In this blog post, I’ll attempt to explain how the tricky bootstrap driver circuit works. I don’t fully understand all the details, but I do grasp the main point here. This is quite an ingenious design.

Intel’s highest-end graphics card lineup is approaching its retail launch, and that means we’re getting more answers to crucial market questions of prices, launch dates, performance, and availability. Today, Intel answered more of those A700-series GPU questions, and they’re paired with claims that every card in the Arc A700 series punches back at Nvidia’s 18-month-old RTX 3060. After announcing a $329 price for its A770 GPU earlier this week, Intel clarified it would launch three A700 series products on October 12: The aforementioned Arc A770 for $329, which sports 8GB of GDDR6 memory; an additional Arc A770 Limited Edition for $349, which jumps up to 16GB of GDDR6 at slightly higher memory bandwidth and otherwise sports otherwise identical specs; and the slightly weaker A750 Limited Edition for $289. These are excellent prices, and assuming Intel can deliver enough supply to meet demand, I think I may have found my next GPU. If history is anything to go by, these will have excellent Linux support, but of course, we would be wise to let the enthusiasts iron out the bugs and issues. Six to twelve months after launch, these could be amazing allrounders for a very good price.

All of that makes Arc a lot more serious than Larrabee, Intel’s last effort to break into the dedicated graphics market. Larrabee was canceled late in its development because of delays and disappointing performance, and Arc GPUs are actual things that you can buy (if only in a limited way, for now). But the challenges of entering the GPU market haven’t changed since the late 2000s. Breaking into a mature market is difficult, and experience with integrated GPUs isn’t always applicable to dedicated GPUs with more complex hardware and their own pool of memory. Regardless of the company’s plans for future architectures, Arc’s launch has been messy. And while the company is making some efforts to own those problems, a combination of performance issues, timing, and financial pressures could threaten Arc’s future. There’s a lot of chatter that Intel might axe Arc completely, before it’s really truly out of the gate. I really hope those rumours are wrong or overblown, since the GPU market desperately needs a 3rd serious competitor. I hope Intel takes a breather, and allows the Arc team to be in it for the long haul, so that we as consumers can benefit from more choice in the near future.

In the world of today’s high performance CPUs, major architectural changes don’t happen often. Iterating off a proven base is safer, cheaper, and faster than attempting to massively rework the basics of how a CPU fetches and executes instructions. But more than 20 years ago, things hadn’t settled down yet. Intel made two attempts to replace its solid but aging P6 microarchitecture with something completely different. One was Itanium, which avoided the complexity associated with out-of-order execution and variable length decode to deliver very wide in-order execution. Pentium 4 was the other, and we’ll be taking a look at it in this article. Its microarchitecture, called Netburst, targeted very high clock speeds using a long pipeline. Alongside this key feature, it brought a wide range of innovative architectural features. As we all know, it didn’t quite pan out the way Intel would have liked. But this architecture was an important learning experience for Intel, and was arguably key to the company’s later success. The Pentium 4 era was wild, with insane promises Intel could not fulfill, but at the same time, an are of innovation and progress that would help Intel in later years. Fascinating time.

Overall though, it’s no denying that Intel is now in the thick of it, or if I were to argue, the market leader. The nuances of the hybrid architecture are still nascent, so it will take time to discover where benefits will come, especially when we get to the laptop variants of Alder Lake. At a retail price of around $650, the Core i9-12900K ends up being competitive between the two Ryzen 9 processors, each with their good points. The only serious downside for Intel though is cost of switching to DDR5, and users learning Windows 11. That’s not necessarily on Intel, but it’s a few more hoops than we regularly jump through. Competition is amazing.

I was wondering what would be the ultimate upgrade for my 386 motherboard. It has a 386 CPU soldered-in, an unpopulated 386 PGA socket and a socket for either 387 FPU or 486 PGA or (might take a Weitek as well – not quite sure) and even might have a soldered-in 486SX PQFP. Plenty of options… But how about hacking a Pentium in? Nothing about this makes any sense, and yet, it’s just plain awesome.