This is a post describing my involvement with the Debian GNU/Linux port for RISC-V (unofficial and not endorsed by Debian at the moment) and announcing the availability of the repository (still very much WIP) with packages built for this architecture.
Good stuff, I’m glad they’ve accomplished this much.
I tried OpenRISC in the browser recently, it was quite enlightening. It’s impressive what some people can get working.
Not sure about why GCC copyright assignment is such a hurdle. But even OpenRISC had a new (forked) GCC toolchain update recently (two months ago). I assume they’ll figure it all out eventually.
And yet another “similar” (eh?) arch is Knuth’s MMIX. That’s also got its own tools (simulator, GCC).
With the relatively recent arrival of FASMG (assembler), I wonder if anyone will write macros for these arches (probably not me!).
Oops, almost forgot about Fabrice Bellard’s recent emulator(s):
http://bellard.org/riscvemu/
It’s interesting too to compare them when you think about the differences in why they originated.
OpenRISC was largely created so some over-zealous individuals could try to create a 100% open-source computer from the bottom up (including open-source hardware). That focus and the mentality that tends to go with it (which is very prevalent in how a lot of GNU software is developed too) is pretty evident in the design.
MMIX was designed for teaching very low-level programming, and that aspect shows as well. It’s insanely easy to write assembly code for (and it’s almost as easy to directly write machine code if you have a talent for hex-editing).
RISC-V though, appears to have been an attempt at an actual production system designed by people who have interest in such things. It looks like it would be pretty good for teaching too, but not quite as easy as MMIX, and it’s definitely better organized and more forward-thinking than OpenRISC.
There is also:
https://lwn.net/Articles/647636/
Edited 2017-04-25 20:19 UTC
OpenRISC creators were quite clueless about how to design a modern RISC ISA. RISC-V is the work of far more knowledgeable people.
In fairness, OpenRISC was created more than 10 years ago. A big difference nowadays, is that a FPGA able to fit a 32bits CPU, cache and FPU is not insanely expensive anymore.
Another example :
http://www.temlib.org
A SparcStation with a 32bits SPARC and all peripherals.