When HP designed the 3000 series 30 using the processor from the HP 300 they had to make it compatible with previous HP 3000s and the HP MPE OS they ran. This entailed breaking down the MPE OS into 2 parts, those that were entirely software dependant, and those that were hardware dependant, and then writing the microcode to handle the hardware dependent part of the OS. Like the HP 300, the HP 3000 architecture is stack based, with the PCU chip holding 2 Top of Stack registers for fast access to the (off chip) stacks. The Series 30/33 have a total of 214 instructions while the HP 300 uses just under 200 instructions. Instructions are 32 bits long and typically [sic]
The exact same ICs are used for the HP 300 as for the Series 30/33 with ‘one pin of each chip tied to a different voltage level.’ Exactly what pin that is and what voltage is not said. Looking at the handdrawn schematic of the Series 33 does show the /DIS pin pulled high (12V) on both the RALU/RASS chips, though what that pin is for is unknown.
Snippet from a concise but dense and interesting article.
I had a vacation job in about ’85 that involved writing some C (probably) code on one of these. I still remember it because I had to debug the surprising (to me, at the time) silent unaligned word load behavior. I’ve never done int a = *(int*)(random_char_pointer) since. Loads only worked as expected if data was naturally aligned. Misalignment didn’t trap, it just gave you the value from the aligned-down address…
It’s funny how C got features to handle systems like that easily…only much, much later.
It is a shame that the once mighty HP is now reduced to selling printers.
There are two HP’s now. Three, if we count Agilent.
Ugh, misspelled words are so dang distracting to me. I spotted these in two seconds, and now I can’t even focus on the content of the article! Does this bother anybody else? The first two are wrong, the third correct:
“entirely software dependant, and those that were hardware dependant, and then writing the microcode to handle the hardware dependent“
I really enjoy reading about these old machines. Because everything was new, they tried many new ideas, some of which are interesting even though they (AFAIK) didn’t survive commercially.
Stack-based designs seem elegant – I need to dig into those further. The other thing that jumped out at me was the variable (single-phase) clock design. That really does seem more efficient than wasting cycles for slow memory.
It’s also amazing that they could implement a 16-bit processor with so few transistors (~20K). And running at 11Mhz, using only 1 watt of power. In the 1970s. I’m impressed.
I think we are so used to the abomination of x86 that we forget about the elegance of other designs.
An 8086 also implemented a 16-bit cpu, running a similar clocks, with similar power consumption, using the same 20K transistor budget.
Yet under the same metrics, one design is “elegant” and the other an “abomination.” It’s fascinating the conclusions that biased subjective qualitative opinions take some…
Actually, I consider the 8086 to be one of those early processors where they tried out some new ideas. Not all of them might have been good ideas in the long run, but they were interesting.
Unfortunately, the following models added features in a Frankenstein’s Monster sort of way, and the result of that was an abomination.
I can see the 286 being an easy target for stylistic concerns. But from the 386 on, x86 has followed a pretty straightforward evolutionary process in its programming model(s) and architecture. IMO of course.
Edited 2016-11-30 22:34 UTC