OSNews

Now that we're in the right frame of mind let's put on our hardware designer hats. First let's select a transport mechanism that presents the flexibility of the old serial port. Three options immediately come to mind: Gigabyte Ethernet, Serial Bus 2.0, and Firewire. Let's choose Firewire (just go with it for now...it's the concept that is important.)

Now, let's build the piece of the new hardware system that will, in the words of Jonathan Boyles, "allow us to carry with us all of our programs, files, context...etc."

We'll start with a PDA sized box containing:
- A CPU (either an Intel, AMD, Power PC, Strong Arm, Mips...pick your poison.)
- A 30 gig. IDE mini-hard drive (loaded with our favorite OS...any one will do.)
- Flash Memory containing enough BIOS to run a POST and Boot the OS off the Drive.
- 1/2 gig. of DRAM.
- Time/Date chip with 10-year battery to constantly track date/time.
- A Firewire chip.
- And finally, a single Firewire port in the side of the box.

From a Physical Device Driver perspective our OS needs concern itself with primarily 2 physical device drivers. One to talk ATA/API to the hard drive. The other to talk to the Firewire chip running the Firewire port.

Now, let's build a second box. We'll call it the "Base Station". It's the piece that sits on our desk at home, office, library, dorm, hotel room, etc. It will include:
- A power supply.
- Multiple Firewire ports on the front panel that serve as Firewire Bridge Ports.
- Ports on the back: Ethernet, Cable modem, DSL, Telephone Line, antenna for wireless.

Now with a Firewire cable in hand, lets connect our Personal Box (PDA) into one of the Firewire ports on the Base Station front panel. Immediately, power flows into our PDA through the 2 Power wires in the Firewire cable. The Firewire Specification actually calls for ports and cables to optionally source some fairly decent voltages and amps, so for our needs the PDA will be totally powered off the Base Station.

The CPU comes to life...BIOS runs POST...Boots OS. At this point the OS just sits and waits for interrupts raised by incoming messages on the Firewire port.

Now let's connect our "Open Firewire Peripherals".

Firewire Keyboard:
- Connect a Firewire keyboard to and empty port on the Base Station and hit a key.
- The resulting scan code is enveloped in a header that identifies it as a keystroke.
- The message is sent out over the Firewire Bus addressed to the PDA.
- It comes into the PDA port and the Firewire Chip sends an interrupt to the CPU.
- The Firewire interrupt handler looks at the header for the "message type".
- Seeing it is a key stoke it takes the data and stuffs it into the keyboard buffer.

Firewire Mouse: - Connect it up.
- It follows exactly the same principle as the Keyboard--but with mouse packets.

Firewire Printer:
- Connect up the printer.
- This time run a program to send print data within Firewire Packets to print on the printer.
- Since most printers are PCL compatible, your print data packets need to include any of the proper PCL escape sequences.

Auxiliary IDE compatible...Hard Drives, CD, CD/RW, DVD, Zip Drives...etc.
- Just plug into one of the base station Firewire ports.
Currently available Firewire to AT/API "tailgate chips" allow these to work seamlessly.

Firewire Scanners, Digital Cameras, etc.
- As before, just plug into one of the base station Firewire ports.

In all the above instances the Physical Firewire Device Driver that is resident in the PDA must look at the incoming "Packet Types". Then it simply acts as a "SUPER DUPER ROUTER"--routing data to the proper application or internal buffers. Going the other direction, outgoing messages have to be enveloped in the correct packet-type and routed out correctly.

Any "control language" tied up in the operation of the various hardware peripheral devices must be embedded within the raw message data itself and standardized and documented so that Software/Subsystems/and High-level Drivers can deal with the commands appropriately.

1. "Open Peripheral Hardware Connectivity, Part I"
2. "Open Peripheral Hardware Connectivity, Part II"
3. "Open Peripheral Hardware Connectivity, Part III"
4. "Open Peripheral Hardware Connectivity, Part IV"