Without question, 2018 was the year RISC-V genuinely began to build momentum among chip architects hungry for open-source instruction sets. That was then.
By 2019, RISC-V won’t be the only game in town.
Wave Computing announced Monday that it is putting MIPS on open source, with MIPS Instruction Set Architecture (ISA) and MIPS’ latest core R6 available in the first quarter of 2019.
Good news, and it makes me wonder – will we ever see a time where x86 and x86-64 are open source? I am definitely not well-versed enough in these matters to judge just how important the closed-source nature of the x86 ISA really is to Intel and AMD, but it seems like something that will never happen.
Intel and Amd are still adding new patented instructions to their chips. Any 3rd party cpu would be twenty years behind.
There is no incentive for someone to spend millions of dollars developing outdated technology.
Except for the Chinese which are developing their own x86 (VIA tech / Zhaoxin)
There is a Chinese company that has a complicated partnership with AMD that will be making Chips in China. To get that past Intel I think AMD must have a 51% ownership of that venture.
I haven’t read anything that gives a clear picture of the Via licensing situation. I doubt they would be shipping any chips outside China.
“Via licensing situation. I doubt they would be shipping any chips outside China.”
They do that all the time. I had one of their C3 Mini ITX motherboards running a firewall many years back. Looking at their web site, they seem to be doing ARM SoCs now, and selling boards based on NXP and Qualcomm parts too. Makes sense. In that market there’s no particular reason for the x86 instruction set.
Using a C7 based mini ITX board since 2007, pleased by its rather good performance for what I do with it.
That’s old x86 stuff. VIA is rumored to have lost its license, and I don’t think it ever had an x64 license.
VIA Nano ?
They still have their license AFAIK. There’s 4 companies that are licensed to produce x86 processors. Intel (Duh), AMD, Via, and i think National Semiconductor, but i think i read something about them selling it off recently.
What does China have to do with VIA’s licensing situation? VIA is based in Taiwan. Now I know China doesn’t officially recognize Taiwan as a country, but the rest of the world does, so…
Edited 2018-12-18 12:12 UTC
https://en.wikipedia.org/wiki/Foreign_relations_of_Taiwan#Bilateral_…
Check again.
I disagree.
Not everyone needs the last 20 years of patented tech.
And the market dynamics of open sourcing everything that was before year-20 could be huge, driving down risks and costs, allowing all kids of innovations to flourish and products to suddenly become viable.
We sent rockets to the moon more than 20 years ago We had the internet flourishing more than 20 years ago.
Even the ideas that gaming or HD idea transcoding won’t be helped is suspect. Maybe someone will build on the open source designs and implement acceleration for these things.
Who knows – maybe someone will come up with a better speculative execution model … .
Yes, but we now have dirt cheap, low power, modern chips that can do everything a 20 year old chip can, but better.
No engineer has ever thought, I only need the power of a Pentium 1 for my application. If we can’t buy some on Ebay will design them from scratch.
Engineers think (something like) that all the time — everything doesn’t need an i9 running at 4ghz. Dealing with CPU vendors is a colossal PITA — unless you’re a huge company, good luck getting datasheets from Intel, Nvidia, or Qualcomm. More “Open Source” hardware is only a good thing — it drives competition, and even if x86 doesn’t get “open sourced”, this drives a demand for better publicly available documentation.
Nice selective quote. When were you buying 20 year old Pentiums?
Then you clearly know nothing about the embedded/IoT world
Neither do you if you think anyone working on IoT is going to consider a chip 20 yrs behind the curve.
20+ years ago I had a DEC MIPS workstation on my desk that was roughly the same performance (and instruction set) as the PIC32 I used in my last project.
So no it isn’t the exact same chip, but I was talking equivalency, as I assumed the OP was
But then again the 65C02 hasn’t changed much in the last couple of decades and is still being sold.
Edited 2018-12-19 02:17 UTC
Hi,
So, why didn’t you just use a DEC MIPS for your last project?
I’m guessing there’s a massive power consumption problem (followed by a physical size problem, followed by an availability problem) that you’ve ignored for the sake of being creatively wrong.
– Brendan
Are these issues more to do with the manufacturing technology rather than the architecture? I guess it could be some of both, but I thought mostly manufacturing. And I thought this discussion was about architecture.
Some of both, i.e. designing the chip to allow for blocks to be selectively powered down when not in use (something most older architectures don’t take into account) isn’t something manufacturing process will automatically make happen. Furthermore, the two are generally pretty tightly coupled; you can’t simply take an old chip design and fab it on a smaller process without making appropriate adjustments to fit said process size.
Thanks. I guess open source architectures might still be very useful, even if they are old, as they could be adapted as needed. Probably not easy, but maybe better than starting from scratch?
Honestly, open source architectures are for the most part for archiving and academic purposes.
Industry moves too fast for this to be of any interest, since by the time HW designs get opensourced, they’re mainly in legacy/life support mode. And fairly removed from the leading edge.
I don’t think that is strictly correct. ICT used the MIPS ISA for Loongson (https://en.wikipedia.org/wiki/Loongson) because there were established tools and expertise for it.
The J-Core project (https://en.wikipedia.org/wiki/SuperH#J_Core) used the SH-2 ISA for the same reason, and because any patents on the ISA have expired.
They used the ISA and they got in trouble for it. The internal microarchitecture is completely homegrown.
ISAs and microarchitecture are two different things.
ISAs are basically open “source” as they get by default. The secret sauce is in the microarchitecture.
Seriously, by the time a commercial architecture gets opensourced is of little general interest.
SPARC has been opensourced for ages (1+ decade) and nobody other than a few academic projects and some very specific industry products using it.
You mean like spacecraft and global positioning systems? I admit they are niche, but still useful. That is worthwhile
You also seem to be ignoring that the MIPS announcement isn’t just for the ISA, but for the latest core as well
You clearly didn’t read all of my rather short post did you?
None of those things have anything to do with IoT btw.
FWIW, the power consumption, size, and cost of the PIC32 are in completely different classes than the MIPS R3000 in that DEC system. Even if the performance is similar, that does not mean it is the same technology as 20 yrs ago.
E.g. A supercomputer 20 yrs ago is in a different class of technology (power consumption, size, cost, etc) than a modern GPU. Even if they achieve similar FLOPS.
You’re right. No engineer ever thought that if they only wanted to buy a handful CPUs.
But engineers do think that if planning on making or using millions of CPUs.
Embedded and IoT come to mind.
Intel compiler will switch off newer instruction when executable is run on competing chips, anyway…
The Intel/AMD x86 architecture dates from the seventies while the home computing market, of which the x86 was an integral part is both saturated and shrinking.
For the majority of today’s users, computing is mobile and here energy efficiency (heat, battery) matters far more than instruction speeds.
For the manufacurers, more supplier options is good, as it will push down prices and let them come out from under the Intel/AMD thumb, just like Android allowed them to escape Microsoft’s licencing model.
So an open source instruction set a manufacturer could tinker with and take to a die company and have made to order may not be so far fetched.
CPU speed matters less and less thanks to a large part of the computing power being offloaded on specialized chips such GPU and/or DSP.
It’s worse than that. x86 can be traced back to before the 4004 was designed. The 1201/8008 ISA was conceived in 1968, a full 50 years ago!
Shit why stop there. x86 can trace its lineage all the way back to ENIAC 70 yrs ago.
Traced how exactly? The x86 isn’t a 4004 and isn’t using the 4004 architecture nor something derived from the 4004 architecture. It isn’t too similar to the 8080 either.
There is https://en.wikipedia.org/wiki/Datapoint_2200 though, maybe that’s what christian was vaguely remembering.
That’s exactly where I was going. The 1201 was Intel’s implementation of CTC’s ISA for the Datapoint 2200. The 1201 was marketed as the 8008 when CTC apparently went with a TTL implementation instead.
8080 was a bigger 8008.
8086 has an ISA that was a superset of 8080, to aid automated translation at assembly level.
So, while a Core i7 processor isn’t an 8086, which isn’t an 8080, which isn’t an 1201/8008, the lineage is clear, and you could follow Intel’s guidelines to translate 8008 assembly source to run otherwise unchanged on your 64-bit Core i7 running in real mode.
The 8080 wasn’t even binary compatible with the 8008.
An i7 can also run MIPS instruactions via emulation, does that make a direct descendant of MIPS?
But the 8080 and 8008 were source compatible. It was also a selling point in the early days that the 8086 and 8080 were source compatible. It was a bit of a deal at the time.
While yes, you could emulate, or transpile from i7 to MIPS, that isn’t the same kind of thing as source level compatibility
Oh come on, the lineage to Datapoint 2200 is clear… it’s not at all like emulation.
MIPS is only used in a very very very small area, so it is easy to Open Source it.
Intel/AMD earn a lot of money with the x86/x64 ISA, so does ARM with theirs. So why Open Source them?
I don’t really agree, MIPS was used in routers and workstations, as well as in a lot of gaming consoles – both PSOne and PS2 used MIPS based CPUs. As a matter of fact I’d love to see dev board with reincarnation of EE+GS
https://elinux.org/MIPS_Creator_CI20
Right, in the beginning they had some success to sell licenses. And you might still find it in some routers or set top boxes. But “workstations”?
But they are at the dead end, so Open Source it.
Really? While SGI have been out of that business for a while, I think a lot of people still remember their graphics workstations, namely SGI IRIS, O2, Octane, Indy and that is not complete list either.
Oh, yes. SGI. The dream of my teenage years …
At that age, I may have been dreaming other things…
Do you mean “a lot” as in “number of units shipped” (then 100% agreed) or as in “number of different consoles”? (in this second case, there’s PS1, PS2, PSP, N64 …and that’s pretty much it IIRC
)
MIPS was a major inspiration for the Alpha processor, and from what I read they had similar ISA.
I would love a return of the Alpha.
Berkeley RISC project was started earlier than Stanford.
The Berkeley RISC design was later commercialized as the SPARC processor, and inspired the landmark DEC Alpha architecture
-wiki
Anyway all these design are almost similar. Except DEC did it right by not including delay slots in the architecture.
To be fair, just about every architecture is usually inspired by the previous architectures in the field. So Alpha took ideas from every other arch at the time; SPARC, MIPS, HP-PA, and even DEC’s own VAX (which was the anti-RISC).
Incidentally, SPARC has been open sourced for a long time. The ISA is, I believe, an IEEE open standard.
A lot of the special sauce that made Alpha great can be found in AMD systems. Particularly HyperTransport and InfinityFabric, which are based on the DEC Alpha bus.
Many of the Alpha CPU architects were hired by AMD and were instrumental in the development of the Athlon and Opteron.
Jim Keller, the guy behind a few AMD and Apple CPUs was an Alpha guy.
Minor nitpick, because I collaborated with the project, but HyperTransport began in academia not Alpha. In fact, I think AMD implemented HyperTransport earlier. Alpha was basically in life support by then.
K7 Athlons even used Alpha EV6 bus outright, so Alpha and K7 systems could share chipsets, and IIRC there were some plans for Alpha CPUs for Slot A CPU connector – Alphas would be compatible with mass market K7 motherboards…
The EV6 bus was not hypertransport BTW.
At some point there was a lot of cross pollination between AMD and DEC.
Lot of Alpha people ended up doing the original 64bit opteron core. Which is why the k8 microarchitecture looks very similar to the EV7 (Alpha 21364)
It was one of my favorite architectures, mainly because it was the basis for the Henessy/Paterson book that was so mainstream among arch courses.
Sadly their business model ended up being a dead end, which in turn made the technology stagnate for too long.
MIPS was pivotal in introducing microprocessors into the 64bit era, they also did some of the earliest out of order micros as well.
Unfortunately, ARM killed them in the low end and embedded markets, and x86 took over the high end. They never were able to reach the volumes in either space needed to compete with those two players, and they lacked the backing of a large specialized vertical systems vendor like IBM and Oracle to subsidize the development of the architecture like Power and SPARC.
I wonder what would have happened if they had opened fully the platform and change into a development/consulting business model. I think that’s where RISC-V is heading.
Oh, well. C’est la vie.
Edited 2018-12-18 22:01 UTC
Any of these alternatives could be viable if they were improved. If ARM can be a contender, so could anything else. ARM isn’t actually that good. Because of the SoC designs, they are incompatible with each other and require a bunch of custom hacks in OS kernels. It is a nightmare.
For cloud, another tech is much more viable.
In terms of open source, Intel is planning on killing that in 2020. UEFI 3 will likely bless linux kernels, but everything else is likely to be disabled and certainly on desktops and laptops.
mips is awesome
Edited 2018-12-23 20:09 UTC